Interfacing an 82C55 Programmable Peripheral Interface to the CDP1802

Purpose:

Add a simple Input/Output interface to any microprocessor system (in this case, my New ELF II CDP1802 based system).

Design Note: Since I don't have any spare Chip Select Memory Address Decoding pins in my New ELF II, I had to improvise another way to make it work.
It turns out that by using a 74273 D-type latch we can add up to five 82C55 chips thus having a total number of 120 I/O pins with this cicuit (24 Programmable I/O Pins X 5 Chips).

Addendum Dec 16, 2017
Last month I did a few changes in my New ELFII design. With the changes, I now have 2 extra Chip Select lines to add other peripheral devices.
The following table shows the new Memory Address Decoding:

Old Memory Address Decoding New Memory Address Decoding
0000-7FFF = 62256 SRAM
8000-87FF = 6551 ACIA
8800-8FFF = 2816 EEPROM
9000-FFFF = 27256 EPROM or 2864 EEPROM


0000-7FFF = 62256 SRAM
8000-87FF = 2816 EEPROM
8800-88FF = 6551 ACIA
8900-89FF = Spare Chip Select (Active LOW)
8A00-8AFF = Spare Chip Select (Active LOW)
8B00-FFFF = 27256 EPROM or 2864 EEPROM

Addendum Dec 16, 2017
New schematic for single 82C55



The schematic in PDF format can be downloaded here - 82C55_PPI.pdf

The datasheet for the 82C55 PPI in PDF format can be downloaded here - 82c55a_Programmable Peripheral Interface.pdf



The schematic in PDF format can be downloaded here - 82C55Interface.pdf

The datasheet for the 82C55 PPI in PDF format can be downloaded here - 82c55a_Programmable Peripheral Interface.pdf


Operation and Programming:

Programming is pretty straight forward.
The 82C55 has 24 I/O pins which may be individually programmed in 2 groups of 12 and used in three basic modes of operation than can be selected by the system software:
Mode 0 - Basic Input/Output
Mode 1 - Strobed Input/Output
Mode 2 - Bidirectional Bus

To explain how to write the software using the 1802 instruction code for this interface, I will only explain it for Mode 0 (Basic Input/Output).
This functional configuration provides simple input and output operations for each of the three ports.
No handshaking is required, data is simply written to or read from a specific port.
Mode 0 Basic Functional Definitions:
• Two 8-bit ports and two 4-bit ports
• Any Port can be input or output
• Outputs are latched
• Inputs are not latched
• 16 different Input/Output configurations possible as shown in this table:
PPIControlByteDefinition.JPG
To select or "control" which pins on the ports (A, B, or C) are to be Inputs or Outputs a "Control Word" register is used.
Just a side note here: personally, I don't know why they (the datasheet) refers this as a "Word" as the data type is a Byte.
Therefore, I will refer to it as the "Control Byte".
The following shows the Control byte:
PPIControlByteDefinition.JPG
The following table shows the basic operation on how to select the different ports and control byte of the 82C55:
PPIBasicOperation.JPG
To control the basic operation with my interface, and as I explained earlier not having an extra chip select, I use a "Command Byte" to control the the PPI's CS_NOT and address pins A0 and A1. The RD_NOT and WR_NOT pins connect directly to the MWR_NOT and MRD_NOT pins of the CDP1802.
NOTE: The RD_NOT of 82C55 connects to MWR_NOT of 1802 - BUS --> M(R(X)),D
and the WR_NOT of 82C55 connects to MRD_NOT of 1802 - M(R(X)) --> BUS
The Command Byte is used to control all 82C55 chips as follows (refer to schematic):
Bit 7 - Connected to RESET pin of all 82C55 chips. A “high” on this input initializes the control register to 9Bh and all ports (A, B, C) are set to the input mode.

Bits 6,5,4,3,2 - Connect these to each of the NAND gates to control CS_NOT pin. Chip select on the 82C55 is an active low input used to enable the 82C55A onto the Data Bus for CPU communications. Select which 82C55 you want by setting the bit to 1.

Bits 1,0 - Address line A1,A0 to control the selection of one of the three ports or the control byte register (the datasheet refers it to 'Control Word' but it's actually a byte).

The Command byte is latched in 74273 with the I61 instruction.
A byte is written to the 82C55 data bus with the I62 instruction.
A byte is read from the 82C55 data bus with the I6A instruction.
Of course, you can use any other 1802 Input-Output Byte transfer instruction.

The following test program list, which will compile with my Special 1802 Assembler shows how to access the 82C55 control/register ports:


Addendum Dec 16, 2017
The following test program list is for the single 82C55, which will compile with my Special 1802 Assembler shows how to access the 82C55 control/register ports: